Power delivery/distribution networks (PDN) typically need to provide a stable direct current (DC) voltage. In order to supply stable voltage to individual logic gates, the PDN may need to manage power delivery through a motherboard, package interconnects, a package, integrated circuit (IC) interconnects, on-chip circuitry, and eventually to individual logic gates and transistors. PDNs must meet specific constraints at each level in order to ensure proper operation.
Semiconductors and signaling interfaces, as well as many other circuits that consume DC current, may power themselves down during idle or other limited usage periods. Power managing the DC current of the circuits may cause the PDN to operate at a resonant condition. This resonance condition could produce undesirable noise and impact the timing and voltage budget of the associated circuits, thus limiting system performance.
Generally, PDN resonance may be countered by reducing the impedance profile of the PDN network. The impedance profile may be reduced by modifying motherboard decoupling, package decoupling, on-die decoupling, by adding power pins, etc. By reducing the impedance profile, noise that occurs at a specific resonance peak may be brought within tolerable limits.
However, reducing the impedance profile of a PDN network comes at the expense mentioned above. For instance, a wirebond package might have to be converted to a flip-chip package to reduce inductance, on-die decoupling might be added to a semiconductor device at the expense of die area, etc.